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System-on-Chip Test Architectures: Nanometer Design for Testability
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General Information
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Type.................: Ebook
Part Size............: 10,417,809
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Post Information
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Posted by............: ~tqw~
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Release Notes
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Modern electronics testing has a legacy of more than 40 years. The introduction
of new technologies, especially nanometer technologies with 90nm or smaller
geometry, has allowed the semiconductor industry to keep pace with the increased
performance-capacity demands from consumers. As a result, semiconductor test
costs have been growing steadily and typically amount to 40% of today's overall
product cost.
This book is a comprehensive guide to new VLSI Testing and
Design-for-Testability techniques that will allow students, researchers, DFT
practitioners, and VLSI designers to master quickly System-on-Chip Test
architectures, for test debug and diagnosis of digital, memory, and
analog/mixed-signal designs.
KEY FEATURES
* Emphasizes VLSI Test principles and Design for Testability architectures, with
numerous illustrations/examples.
* Most up-to-date coverage available, including Fault Tolerance, Low-Power
Testing, Defect and Error Tolerance, Network-on-Chip (NOC) Testing,
Software-Based Self-Testing, FPGA Testing, MEMS Testing, and System-In-Package
(SIP) Testing, which are not yet available in any testing book.
* Covers the entire spectrum of VLSI testing and DFT architectures, from digital
and analog, to memory circuits, and fault diagnosis and self-repair from
digital to memory circuits.
* Discusses future nanotechnology test trends and challenges facing the
nanometer design era; promising nanotechnology test techniques, including
Quantum-Dots, Cellular Automata, Carbon-Nanotubes, and Hybrid
Semiconductor/Nanowire/Molecular Computing.
* Practical problems at the end of each chapter for students.
Table Of Contents
Preface xxi
In the Classroom xxvii
Acknowledgments xxix
Contributors xxxi
About the Editors xxxv
1 Introduction 1
2 Digital Test Architectures 41
3 Fault-Tolerant Design 123
4 System/Network-on-Chip Test Architectures 171
5 SIP Test Architectures 225
6 Delay Testing 263
7 Low-Power Testing 307
8 Coping with Physical Failures, Soft Errors, and Reliability Issues 351
9 Design for Manufacturability and Yield 423
10 Design for Debug and Diagnosis 463
11 Software-Based Self-Testing 505
12 Field Programmable Gate Array Testing 549
13 MEMS Testing 59
14 High-Speed I/O Interfaces 653
15 Analog and Mixed-Signal Test Architectures 703
16 RF Testing 745
17 Testing Aspects of Nanotechnology Trends 791
Index 833
Product Details
* ISBN: 012373973X
* ISBN-13: 9780123739735
* Format: Hardcover, 856pp
* Publisher: Morgan Kaufmann Publishers
* Pub. Date: November 2007
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Install Notes
-------------------------------------------------------------------------------
Adobe Acrobat Reader
*******************************************************************************
System-on-Chip Test Architectures: Nanometer Design for Testability
*******************************************************************************
-------------------------------------------------------------------------------
General Information
-------------------------------------------------------------------------------
Type.................: Ebook
Part Size............: 10,417,809
-------------------------------------------------------------------------------
Post Information
-------------------------------------------------------------------------------
Posted by............: ~tqw~
-------------------------------------------------------------------------------
Release Notes
-------------------------------------------------------------------------------
Modern electronics testing has a legacy of more than 40 years. The introduction
of new technologies, especially nanometer technologies with 90nm or smaller
geometry, has allowed the semiconductor industry to keep pace with the increased
performance-capacity demands from consumers. As a result, semiconductor test
costs have been growing steadily and typically amount to 40% of today's overall
product cost.
This book is a comprehensive guide to new VLSI Testing and
Design-for-Testability techniques that will allow students, researchers, DFT
practitioners, and VLSI designers to master quickly System-on-Chip Test
architectures, for test debug and diagnosis of digital, memory, and
analog/mixed-signal designs.
KEY FEATURES
* Emphasizes VLSI Test principles and Design for Testability architectures, with
numerous illustrations/examples.
* Most up-to-date coverage available, including Fault Tolerance, Low-Power
Testing, Defect and Error Tolerance, Network-on-Chip (NOC) Testing,
Software-Based Self-Testing, FPGA Testing, MEMS Testing, and System-In-Package
(SIP) Testing, which are not yet available in any testing book.
* Covers the entire spectrum of VLSI testing and DFT architectures, from digital
and analog, to memory circuits, and fault diagnosis and self-repair from
digital to memory circuits.
* Discusses future nanotechnology test trends and challenges facing the
nanometer design era; promising nanotechnology test techniques, including
Quantum-Dots, Cellular Automata, Carbon-Nanotubes, and Hybrid
Semiconductor/Nanowire/Molecular Computing.
* Practical problems at the end of each chapter for students.
Table Of Contents
Preface xxi
In the Classroom xxvii
Acknowledgments xxix
Contributors xxxi
About the Editors xxxv
1 Introduction 1
2 Digital Test Architectures 41
3 Fault-Tolerant Design 123
4 System/Network-on-Chip Test Architectures 171
5 SIP Test Architectures 225
6 Delay Testing 263
7 Low-Power Testing 307
8 Coping with Physical Failures, Soft Errors, and Reliability Issues 351
9 Design for Manufacturability and Yield 423
10 Design for Debug and Diagnosis 463
11 Software-Based Self-Testing 505
12 Field Programmable Gate Array Testing 549
13 MEMS Testing 59
14 High-Speed I/O Interfaces 653
15 Analog and Mixed-Signal Test Architectures 703
16 RF Testing 745
17 Testing Aspects of Nanotechnology Trends 791
Index 833
Product Details
* ISBN: 012373973X
* ISBN-13: 9780123739735
* Format: Hardcover, 856pp
* Publisher: Morgan Kaufmann Publishers
* Pub. Date: November 2007
-------------------------------------------------------------------------------
Install Notes
-------------------------------------------------------------------------------
Adobe Acrobat Reader